clock enable register
| CLK_FC0_EN | Write 1 to enable FLEXCOMM0 clock |
| CLK_FC1_EN | Write 1 to enable FLEXCOMM1 clock |
| CLK_FC2_EN | Write 1 to enable FLEXCOMM2 clock |
| CLK_FC3_EN | Write 1 to enable FLEXCOMM3 clock |
| CLK_TIM0_EN | Write 1 to enable CTIMER0 clock |
| CLK_TIM1_EN | Write 1 to enable CTIMER1 clock |
| CLK_TIM2_EN | Write 1 to enable CTIMER2 clock |
| CLK_TIM3_EN | Write 1 to enable CTIMER3 clock |
| CLK_SCT_EN | Write 1 to enable SCT clock |
| CLK_WDT_EN | Write 1 to enable Watch Dog clock |
| CLK_USB_EN | Write 1 to enable USB clock; |
| CLK_GPIO_EN | Write 1 to enable GPIO clock |
| CLK_BIV_EN | Write 1 to enable BIV APB clock include RTC BiV register. |
| CLK_ADC_EN | Write 1 to enable ADC clock; |
| CLK_DAC_EN | Write 1 to enable DAC clock; |
| CLK_CS_EN | Write 1 to enable Cap sensor clock; |
| CLK_FSP_EN | Write 1 to enable FSP clock; |
| CLK_DMA_EN | Write 1 to enable DMA clock |
| CLK_QDEC0_EN | Write 1 to enable QDEC0 clock; |
| CLK_QDEC1_EN | Write 1 to enable QDEC1 clock; |
| CLK_DP_EN | Write 1 to enable Data Path 16/8MHz clock; |
| CLK_SPIFI_EN | Write 1 to enable SPIFI clock; |
| CLK_CAL_EN | Write 1 to enable Calibration clock; |
| CLK_BLE_EN | Write 1 to enable BLE clock |